� ���28��(>�%ti,omap3430-sdpti,omap3430ti,omap3 +7TI OMAP3430 SDPchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000cpus+cpu@0arm,cortex-a8dcpupt{cpu����pmu@54000000arm,cortex-a8-pmupT���debugsssocti,omap-inframpu ti,omap3-mpu�mpuiva ti,iva2.2�ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busph� +��l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ �Hscm@2000ti,omap3-scmsimple-busp + � pinmux@30 ti,omap3-padconfpinctrl-singlep08+�����pinmux_twl4030_pins5�AI�scm_conf@270sysconsimple-buspp0+ �p0Ipbias_regulator@2b0ti,pbias-omap3ti,pbias-omapp�Qpbias_mmc_omap2430Xpbias_mmc_omap2430gw@-��I�clocks+mcbsp5_mux_fck@68�ti,composite-mux-clockt�phImcbsp5_fck�ti,composite-clocktI�mcbsp1_mux_fck@4�ti,composite-mux-clockt�pI mcbsp1_fck�ti,composite-clockt I�mcbsp2_mux_fck@4�ti,composite-mux-clockt �pI mcbsp2_fck�ti,composite-clockt I�mcbsp3_mux_fck@68�ti,composite-mux-clockt phImcbsp3_fck�ti,composite-clocktI�mcbsp4_mux_fck@68�ti,composite-mux-clockt �phImcbsp4_fck�ti,composite-clocktI�clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlep \+�����pinmux_twl4030_vpins 5I�aes@480c5000 ti,omap3-aes�aespH PP��AB�txrxprm@48306000 ti,omap3-prmpH0`@� clocks+virt_16_8m_ck� fixed-clock�YIosc_sys_ck@d40� ti,mux-clocktp @Isys_ck@1270�ti,divider-clockt��pp�Isys_clkout1@d70�ti,gate-clocktp p�dpll3_x2_ck�fixed-factor-clockt��dpll3_m2x2_ck�fixed-factor-clockt��Idpll4_x2_ck�fixed-factor-clockt��corex2_fck�fixed-factor-clockt��Iwkup_l4_ick�fixed-factor-clockt��INcorex2_d3_fck�fixed-factor-clockt��I�corex2_d5_fck�fixed-factor-clockt��I�clockdomainscm@48004000 ti,omap3-cmpH@@clocks+dummy_apb_pclk� fixed-clock�omap_32k_fck� fixed-clock��I@virt_12m_ck� fixed-clock��Ivirt_13m_ck� fixed-clock��]@Ivirt_19200000_ck� fixed-clock�$�Ivirt_26000000_ck� fixed-clock����Ivirt_38_4m_ck� fixed-clock�I�Idpll4_ck@d00�ti,omap3-dpll-per-clocktp D 0Idpll4_m2_ck@d48�ti,divider-clockt�?p H�I dpll4_m2x2_mul_ck�fixed-factor-clockt ��I!dpll4_m2x2_ck@d00�ti,gate-clockt!�p I"omap_96m_alwon_fck�fixed-factor-clockt"��I)dpll3_ck@d00�ti,omap3-dpll-core-clocktp @ 0Idpll3_m3_ck@1140�ti,divider-clockt��p@�I#dpll3_m3x2_mul_ck�fixed-factor-clockt#��I$dpll3_m3x2_ck@d00�ti,gate-clockt$� p I%emu_core_alwon_ck�fixed-factor-clockt%��Ibsys_altclk� fixed-clock�I.mcbsp_clks� fixed-clock�Idpll3_m2_ck@d40�ti,divider-clockt��p @�Icore_ck�fixed-factor-clockt��I&dpll1_fck@940�ti,divider-clockt&��p @�I'dpll1_ck@904�ti,omap3-dpll-clockt'p  $ @ 4Idpll1_x2_ck�fixed-factor-clockt��I(dpll1_x2m2_ck@944�ti,divider-clockt(�p D�I<cm_96m_fck�fixed-factor-clockt)��I*omap_96m_fck@d40� ti,mux-clockt*�p @IEdpll4_m3_ck@e40�ti,divider-clockt�� p@�I+dpll4_m3x2_mul_ck�fixed-factor-clockt+��I,dpll4_m3x2_ck@d00�ti,gate-clockt,�p I-omap_54m_fck@d40� ti,mux-clockt-.�p @I8cm_96m_d2_fck�fixed-factor-clockt*��I/omap_48m_fck@d40� ti,mux-clockt/.�p @I0omap_12m_fck�fixed-factor-clockt0��IGdpll4_m4_ck@e40�ti,divider-clockt�p@�I1dpll4_m4x2_mul_ck�ti,fixed-factor-clockt1+8I2dpll4_m4x2_ck@d00�ti,gate-clockt2�p 8I�dpll4_m5_ck@f40�ti,divider-clockt�?p@�I3dpll4_m5x2_mul_ck�ti,fixed-factor-clockt3+8I4dpll4_m5x2_ck@d00�ti,gate-clockt4�p 8Ijdpll4_m6_ck@1140�ti,divider-clockt��?p@�I5dpll4_m6x2_mul_ck�fixed-factor-clockt5��I6dpll4_m6x2_ck@d00�ti,gate-clockt6�p I7emu_per_alwon_ck�fixed-factor-clockt7��Icclkout2_src_gate_ck@d70� ti,composite-no-wait-gate-clockt&�p pI9clkout2_src_mux_ck@d70�ti,composite-mux-clockt&*8p pI:clkout2_src_ck�ti,composite-clockt9:I;sys_clkout2@d70�ti,divider-clockt;��@p pKmpu_ck�fixed-factor-clockt<��I=arm_fck@924�ti,divider-clockt=p $�emu_mpu_alwon_ck�fixed-factor-clockt=��Idl3_ick@a40�ti,divider-clockt&�p @�I>l4_ick@a40�ti,divider-clockt>��p @�I?rm_ick@c40�ti,divider-clockt?��p @�gpt10_gate_fck@a00�ti,composite-gate-clockt� p IAgpt10_mux_fck@a40�ti,composite-mux-clockt@�p @IBgpt10_fck�ti,composite-clocktABgpt11_gate_fck@a00�ti,composite-gate-clockt� p ICgpt11_mux_fck@a40�ti,composite-mux-clockt@�p @IDgpt11_fck�ti,composite-clocktCDcore_96m_fck�fixed-factor-clocktE��Immchs2_fck@a00�ti,wait-gate-clocktp �I�mmchs1_fck@a00�ti,wait-gate-clocktp �I�i2c3_fck@a00�ti,wait-gate-clocktp �I�i2c2_fck@a00�ti,wait-gate-clocktp �I�i2c1_fck@a00�ti,wait-gate-clocktp �I�mcbsp5_gate_fck@a00�ti,composite-gate-clockt� p Imcbsp1_gate_fck@a00�ti,composite-gate-clockt� p I core_48m_fck�fixed-factor-clockt0��IFmcspi4_fck@a00�ti,wait-gate-clocktFp �I�mcspi3_fck@a00�ti,wait-gate-clocktFp �I�mcspi2_fck@a00�ti,wait-gate-clocktFp �I�mcspi1_fck@a00�ti,wait-gate-clocktFp �I�uart2_fck@a00�ti,wait-gate-clocktFp �I�uart1_fck@a00�ti,wait-gate-clocktFp � I�core_12m_fck�fixed-factor-clocktG��IHhdq_fck@a00�ti,wait-gate-clocktHp �I�core_l3_ick�fixed-factor-clockt>��IIsdrc_ick@a10�ti,wait-gate-clocktIp �I�gpmc_fck�fixed-factor-clocktI��core_l4_ick�fixed-factor-clockt?��IJmmchs2_ick@a10�ti,omap3-interface-clocktJp �I�mmchs1_ick@a10�ti,omap3-interface-clocktJp �I�hdq_ick@a10�ti,omap3-interface-clocktJp �I�mcspi4_ick@a10�ti,omap3-interface-clocktJp �I�mcspi3_ick@a10�ti,omap3-interface-clocktJp �I�mcspi2_ick@a10�ti,omap3-interface-clocktJp �I�mcspi1_ick@a10�ti,omap3-interface-clocktJp �I�i2c3_ick@a10�ti,omap3-interface-clocktJp �I�i2c2_ick@a10�ti,omap3-interface-clocktJp �I�i2c1_ick@a10�ti,omap3-interface-clocktJp �I�uart2_ick@a10�ti,omap3-interface-clocktJp �I�uart1_ick@a10�ti,omap3-interface-clocktJp � I�gpt11_ick@a10�ti,omap3-interface-clocktJp � I�gpt10_ick@a10�ti,omap3-interface-clocktJp � I�mcbsp5_ick@a10�ti,omap3-interface-clocktJp � I�mcbsp1_ick@a10�ti,omap3-interface-clocktJp � I�omapctrl_ick@a10�ti,omap3-interface-clocktJp �I�dss_tv_fck@e00�ti,gate-clockt8p�I�dss_96m_fck@e00�ti,gate-clocktEp�I�dss2_alwon_fck@e00�ti,gate-clocktp�I�dummy_ck� fixed-clock�gpt1_gate_fck@c00�ti,composite-gate-clockt�p IKgpt1_mux_fck@c40�ti,composite-mux-clockt@p @ILgpt1_fck�ti,composite-clocktKLI�aes2_ick@a10�ti,omap3-interface-clocktJ�p I�wkup_32k_fck�fixed-factor-clockt@��IMgpio1_dbck@c00�ti,gate-clocktMp �I�sha12_ick@a10�ti,omap3-interface-clocktJp �I�wdt2_fck@c00�ti,wait-gate-clocktMp �I�wdt2_ick@c10�ti,omap3-interface-clocktNp �I�wdt1_ick@c10�ti,omap3-interface-clocktNp �I�gpio1_ick@c10�ti,omap3-interface-clocktNp �I�omap_32ksync_ick@c10�ti,omap3-interface-clocktNp �I�gpt12_ick@c10�ti,omap3-interface-clocktNp �I�gpt1_ick@c10�ti,omap3-interface-clocktNp �I�per_96m_fck�fixed-factor-clockt)��I per_48m_fck�fixed-factor-clockt0��IOuart3_fck@1000�ti,wait-gate-clocktOp� I�gpt2_gate_fck@1000�ti,composite-gate-clockt�pIPgpt2_mux_fck@1040�ti,composite-mux-clockt@p@IQgpt2_fck�ti,composite-clocktPQI�gpt3_gate_fck@1000�ti,composite-gate-clockt�pIRgpt3_mux_fck@1040�ti,composite-mux-clockt@�p@ISgpt3_fck�ti,composite-clocktRSgpt4_gate_fck@1000�ti,composite-gate-clockt�pITgpt4_mux_fck@1040�ti,composite-mux-clockt@�p@IUgpt4_fck�ti,composite-clocktTUgpt5_gate_fck@1000�ti,composite-gate-clockt�pIVgpt5_mux_fck@1040�ti,composite-mux-clockt@�p@IWgpt5_fck�ti,composite-clocktVWgpt6_gate_fck@1000�ti,composite-gate-clockt�pIXgpt6_mux_fck@1040�ti,composite-mux-clockt@�p@IYgpt6_fck�ti,composite-clocktXYgpt7_gate_fck@1000�ti,composite-gate-clockt�pIZgpt7_mux_fck@1040�ti,composite-mux-clockt@�p@I[gpt7_fck�ti,composite-clocktZ[gpt8_gate_fck@1000�ti,composite-gate-clockt� pI\gpt8_mux_fck@1040�ti,composite-mux-clockt@�p@I]gpt8_fck�ti,composite-clockt\]gpt9_gate_fck@1000�ti,composite-gate-clockt� pI^gpt9_mux_fck@1040�ti,composite-mux-clockt@�p@I_gpt9_fck�ti,composite-clockt^_per_32k_alwon_fck�fixed-factor-clockt@��I`gpio6_dbck@1000�ti,gate-clockt`p�I�gpio5_dbck@1000�ti,gate-clockt`p�I�gpio4_dbck@1000�ti,gate-clockt`p�I�gpio3_dbck@1000�ti,gate-clockt`p�I�gpio2_dbck@1000�ti,gate-clockt`p� I�wdt3_fck@1000�ti,wait-gate-clockt`p� I�per_l4_ick�fixed-factor-clockt?��Iagpio6_ick@1010�ti,omap3-interface-clocktap�I�gpio5_ick@1010�ti,omap3-interface-clocktap�I�gpio4_ick@1010�ti,omap3-interface-clocktap�I�gpio3_ick@1010�ti,omap3-interface-clocktap�I�gpio2_ick@1010�ti,omap3-interface-clocktap� I�wdt3_ick@1010�ti,omap3-interface-clocktap� I�uart3_ick@1010�ti,omap3-interface-clocktap� I�uart4_ick@1010�ti,omap3-interface-clocktap�I�gpt9_ick@1010�ti,omap3-interface-clocktap� I�gpt8_ick@1010�ti,omap3-interface-clocktap� I�gpt7_ick@1010�ti,omap3-interface-clocktap�I�gpt6_ick@1010�ti,omap3-interface-clocktap�I�gpt5_ick@1010�ti,omap3-interface-clocktap�I�gpt4_ick@1010�ti,omap3-interface-clocktap�I�gpt3_ick@1010�ti,omap3-interface-clocktap�I�gpt2_ick@1010�ti,omap3-interface-clocktap�I�mcbsp2_ick@1010�ti,omap3-interface-clocktap�I�mcbsp3_ick@1010�ti,omap3-interface-clocktap�I�mcbsp4_ick@1010�ti,omap3-interface-clocktap�I�mcbsp2_gate_fck@1000�ti,composite-gate-clockt�pI mcbsp3_gate_fck@1000�ti,composite-gate-clockt�pImcbsp4_gate_fck@1000�ti,composite-gate-clockt�pIemu_src_mux_ck@1140� ti,mux-clocktbcdp@Ieemu_src_ck�ti,clkdm-gate-clockteIfpclk_fck@1140�ti,divider-clocktf��p@�pclkx2_fck@1140�ti,divider-clocktf��p@�atclk_fck@1140�ti,divider-clocktf��p@�traceclk_src_fck@1140� ti,mux-clocktbcd�p@Igtraceclk_fck@1140�ti,divider-clocktg� �p@�secure_32k_fck� fixed-clock��Ihgpt12_fck�fixed-factor-clockth��I�wdt1_fck�fixed-factor-clockth��security_l4_ick2�fixed-factor-clockt?��Iiaes1_ick@a14�ti,omap3-interface-clockti�p rng_ick@a14�ti,omap3-interface-clocktip �I�sha11_ick@a14�ti,omap3-interface-clocktip �des1_ick@a14�ti,omap3-interface-clocktip �cam_mclk@f00�ti,gate-clocktj�p8cam_ick@f10�!ti,omap3-no-wait-interface-clockt?p�I�csi2_96m_fck@f00�ti,gate-clocktp�I�security_l3_ick�fixed-factor-clockt>��Ikpka_ick@a14�ti,omap3-interface-clocktkp �icr_ick@a10�ti,omap3-interface-clocktJp �des2_ick@a10�ti,omap3-interface-clocktJp �mspro_ick@a10�ti,omap3-interface-clocktJp �mailboxes_ick@a10�ti,omap3-interface-clocktJp �ssi_l4_ick�fixed-factor-clockt?��Irsr1_fck@c00�ti,wait-gate-clocktp �I�sr2_fck@c00�ti,wait-gate-clocktp �I�sr_l4_ick�fixed-factor-clockt?��dpll2_fck@40�ti,divider-clockt&��p@�Ildpll2_ck@4�ti,omap3-dpll-clocktlp$@4as{Imdpll2_m2_ck@44�ti,divider-clocktm�pD�Iniva2_ck@0�ti,wait-gate-clocktnp�I�modem_fck@a00�ti,omap3-interface-clocktp �I�sad2d_ick@a10�ti,omap3-interface-clockt>p �I�mad2d_ick@a18�ti,omap3-interface-clockt>p �I�mspro_fck@a00�ti,wait-gate-clocktp �ssi_ssr_gate_fck_3430es2@a00� ti,composite-no-wait-gate-clockt�p Iossi_ssr_div_fck_3430es2@a40�ti,composite-divider-clockt�p @$�Ipssi_ssr_fck_3430es2�ti,composite-clocktopIqssi_sst_fck_3430es2�fixed-factor-clocktq��I�hsotgusb_ick_3430es2@a10�"ti,omap3-hsotgusb-interface-clocktIp �I�ssi_ick_3430es2@a10�ti,omap3-ssi-interface-clocktrp �I�usim_gate_fck@c00�ti,composite-gate-clocktE� p I}sys_d2_ck�fixed-factor-clockt��Itomap_96m_d2_fck�fixed-factor-clocktE��Iuomap_96m_d4_fck�fixed-factor-clocktE��Ivomap_96m_d8_fck�fixed-factor-clocktE��Iwomap_96m_d10_fck�fixed-factor-clocktE�� Ixdpll5_m2_d4_ck�fixed-factor-clockts��Iydpll5_m2_d8_ck�fixed-factor-clockts��Izdpll5_m2_d16_ck�fixed-factor-clockts��I{dpll5_m2_d20_ck�fixed-factor-clockts��I|usim_mux_fck@c40�ti,composite-mux-clock(ttuvwxyz{|�p @�I~usim_fck�ti,composite-clockt}~usim_ick@c10�ti,omap3-interface-clocktNp � I�dpll5_ck@d04�ti,omap3-dpll-clocktp  $ L 4asIdpll5_m2_ck@d50�ti,divider-clockt�p P�Issgx_gate_fck@b00�ti,composite-gate-clockt&�p I�core_d3_ck�fixed-factor-clockt&��I�core_d4_ck�fixed-factor-clockt&��I�core_d6_ck�fixed-factor-clockt&��I�omap_192m_alwon_fck�fixed-factor-clockt"��I�core_d2_ck�fixed-factor-clockt&��I�sgx_mux_fck@b40�ti,composite-mux-clock t���*����p @I�sgx_fck�ti,composite-clockt��I�sgx_ick@b10�ti,wait-gate-clockt>p �I�cpefuse_fck@a08�ti,gate-clocktp �I�ts_fck@a08�ti,gate-clockt@p �I�usbtll_fck@a08�ti,wait-gate-clocktsp �I�usbtll_ick@a18�ti,omap3-interface-clocktJp �I�mmchs3_ick@a10�ti,omap3-interface-clocktJp �I�mmchs3_fck@a00�ti,wait-gate-clocktp �I�dss1_alwon_fck_3430es2@e00�ti,dss-gate-clockt��p8I�dss_ick_3430es2@e10�ti,omap3-dss-interface-clockt?p�I�usbhost_120m_fck@1400�ti,gate-clocktsp�I�usbhost_48m_fck@1400�ti,dss-gate-clockt0p�I�usbhost_ick@1410�ti,omap3-dss-interface-clockt?p�I�clockdomainscore_l3_clkdmti,clockdomaint��dpll3_clkdmti,clockdomaintdpll1_clkdmti,clockdomaintper_clkdmti,clockdomainht��������������������������emu_clkdmti,clockdomaintfdpll4_clkdmti,clockdomaintwkup_clkdmti,clockdomain$t���������dss_clkdmti,clockdomaint�����core_l4_clkdmti,clockdomain�t�������������������������������������cam_clkdmti,clockdomaint��iva2_clkdmti,clockdomaint�dpll2_clkdmti,clockdomaintmd2d_clkdmti,clockdomain t���dpll5_clkdmti,clockdomaintsgx_clkdmti,clockdomaint�usbhost_clkdmti,clockdomain t���target-module@48320000ti,sysc-omap2ti,syscpH2H2 �revsysc�tM�{fckick+ �H2counter@0ti,omap-counter32kp interrupt-controller@48200000ti,omap3-intc��pH Itarget-module@48056000ti,sysc-omap2ti,syscpH`H`,H`(�revsyscsyss�# � ��tI{ick+ �H`dma-controller@0ti,omap3430-sdmati,omap-sdmap� �� �`Igpio@48310000ti,omap3-gpiopH1��gpio1"��gpio@49050000ti,omap3-gpiopI��gpio2"��gpio@49052000ti,omap3-gpiopI ��gpio3"��gpio@49054000ti,omap3-gpiopI@� �gpio4"��gpio@49056000ti,omap3-gpiopI`�!�gpio5"��gpio@49058000ti,omap3-gpiopI��"�gpio6"��serial@4806a000ti,omap3-uartpH� .H�12�txrx�uart1��lserial@4806c000ti,omap3-uartpH�.I�34�txrx�uart2��lserial@49020000ti,omap3-uartpI.J�56�txrx�uart3��li2c@48070000 ti,omap3-i2cpH��8��txrx+�i2c1�'�@twl@48pH� ti,twl4030��BdefaultP��rtcti,twl4030-rtc� bciti,twl4030-bci� Z�h� tvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1g '� regulator-vdacti,twl4030-vdacgw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1g:�0�I�regulator-vmmc2ti,twl4030-vmmc2g:�0�regulator-vusb1v5ti,twl4030-vusb1v5I�regulator-vusb1v8ti,twl4030-vusb1v8I�regulator-vusb3v1ti,twl4030-vusb3v1I�regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2gw@w@regulator-vsimti,twl4030-vsimgw@-��I�gpioti,twl4030-gpio"��twl4030-usbti,twl4030-usb� ��������pwmti,twl4030-pwm�pwmledti,twl4030-pwmled�pwrbuttonti,twl4030-pwrbutton�keypadti,twl4030-keypad���madcti,twl4030-madc��I�i2c@48072000 ti,omap3-i2cpH ��9��txrx+�i2c2i2c@48060000 ti,omap3-i2cpH��=��txrx+�i2c3mailbox@48094000ti,omap3-mailbox�mailboxpH @�!dsp 3 >spi@48098000ti,omap2-mcspipH ��A+�mcspi1I@�#$%&'()* �tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspipH ��B+�mcspi2I �+,-.�tx0rx0tx1rx1spi@480b8000ti,omap2-mcspipH ��[+�mcspi3I ��tx0rx0tx1rx1spi@480ba000ti,omap2-mcspipH ��0+�mcspi4I�FG�tx0rx01w@480b2000 ti,omap3-1wpH �:�hdq1wmmc@4809c000ti,omap3-hsmmcpH ��S�mmc1W�=>�txrxd�q�}��mmc@480b4000ti,omap3-hsmmcpH @�V�mmc2�/0�txrx �disabledmmc@480ad000ti,omap3-hsmmcpH ��^�mmc3�MN�txrx �disabledmmu@480bd400�ti,omap2-iommupH ����mmu_isp�I�mmu@5d000000�ti,omap2-iommup]���mmu_iva �disabledwdt@48314000 ti,omap3-wdtpH1@� �wd_timer2mcbsp@48074000ti,omap3-mcbsppH@��mpu �;< �commontxrx���mcbsp1� �txrxt�{fck �disabledtarget-module@480a0000ti,sysc-omap2ti,syscpH <H @H D�revsyscsyss���t�{ick+ �H rng@0 ti,omap2-rngp �4mcbsp@49022000ti,omap3-mcbsppI �I�� �mpusidetone�>?�commontxrxsidetone��mcbsp2mcbsp2_sidetone�!"�txrxt��{fckick �disabledmcbsp@49024000ti,omap3-mcbsppI@�I�� �mpusidetone�YZ�commontxrxsidetone���mcbsp3mcbsp3_sidetone��txrxt��{fckick �disabledmcbsp@49026000ti,omap3-mcbsppI`��mpu �67 �commontxrx���mcbsp4��txrxt�{fck� �disabledmcbsp@48096000ti,omap3-mcbsppH `��mpu �QR �commontxrx���mcbsp5��txrxt�{fck �disabledsham@480c3000ti,omap3-sham�shampH 0d�1�E�rxtarget-module@48318000ti,sysc-omap2-timerti,syscpH1�H1�H1��revsyscsyss�' ��t��{fckick+ �H1���timer@0ti,omap3430-timerp�t�{fck�%�&@target-module@49032000ti,sysc-omap2-timerti,syscpI I I �revsyscsyss�' ��t��{fckick+ �I timer@0ti,omap3430-timerp�&timer@49034000ti,omap3430-timerpI@�'�timer3timer@49036000ti,omap3430-timerpI`�(�timer4timer@49038000ti,omap3430-timerpI��)�timer5=timer@4903a000ti,omap3430-timerpI��*�timer6=timer@4903c000ti,omap3430-timerpI��+�timer7=timer@4903e000ti,omap3430-timerpI��,�timer8J=timer@49040000ti,omap3430-timerpI�-�timer9Jtimer@48086000ti,omap3430-timerpH`�.�timer10Jtimer@48088000ti,omap3430-timerpH��/�timer11Jtarget-module@48304000ti,sysc-omap2-timerti,syscpH0@H0@H0@�revsyscsyss�' ��t��{fckick+ �H0@timer@0ti,omap3430-timerp�_Wusbhstll@48062000 ti,usbhs-tllpH �N �usb_tll_hsusbhshost@48064000ti,usbhs-hostpH@ �usb_host_hs+�ohci@48064400ti,ohci-omap3pHD�Lgehci@48064800 ti,ehci-omappHH�Mgpmc@6e000000ti,omap3430-gpmc�gpmcpn����rxtx�+��"0�( I�nor@0,0 cfi-flash�intel,pf48f6000m0y1be+ p��������  0006>�M6[�j�{��r�� ��Z��*partition@0Dbootloader-norppartition@40000 Dparams-norppartition@80000 Dkernel-norp partition@280000Dfilesystem-norp$�nand@1,0ti,omap2-nand p ���micron,mt29f1g08abb+JswZ��$�$� $0>0M[jH{H�6�partition@0 Dxloader-nandppartition@80000Dbootloader-nandppartition@1c0000 Dparams-nandp partition@280000 Dkernel-nandp(Ppartition@780000Dfilesystem-nandpx�onenand@2,0�samsung,kfm2g16q2m-deb8+ti,omap2-onenand pi���T�H� 0>TM[*jl{`�N�partition@0Dxloader-onenandppartition@80000Dbootloader-onenandppartition@c0000Dparams-onenandp partition@e0000Dkernel-onenandp partition@2e0000Dfilesystem-onenandp.�usb_otg_hs@480ab000ti,omap3-musbpH ��\]�mcdma �usb_otg_hs{�� dss@48050000 ti,omap3-dsspH �disabled �dss_coret�{fck+�dispc@48050400ti,omap3-dispcpH� �dss_dispct�{fckencoder@4804fc00 ti,omap3-dsipH�H�@H� �protophypll� �disabled �dss_dsi1t�� {fcksys_clkencoder@48050800ti,omap3-rfbipH �disabled �dss_rfbit��{fckickencoder@48050c00ti,omap3-vencpH  �disabled �dss_venct�{fckssi-controller@48058000 ti,omap3-ssi�ssi�okpH�H��sysgdd�G�gdd_mpu+� tq�� {ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portpH�H��txrx�CDssi-port@4805b000ti,omap3-ssi-portpH�H��txrx�EFpinmux@480025d8 ti,omap3-padconfpinctrl-singlepH%�$+�����isp@480bc000 ti,omap3-isppH ��H �|���Ql��ports+bandgap@48002524pH%$ti,omap34xx-bandgap�I�target-module@480cb000ti,sysc-omap3430-srti,sysc�smartreflex_corepH �$�sysc�t�{fck+ �H �smartreflex@0ti,omap3-smartreflex-corep�target-module@480c9000ti,sysc-omap3430-srti,sysc�smartreflex_mpu_ivapH �$�sysc�t�{fck+ �H �smartreflex@480c9000ti,omap3-smartreflex-mpu-ivap�target-module@50000000ti,sysc-omap2ti,syscpP�revt��{fckick+ �P@opp-tableoperating-points-v2-ti-cpuQIopp1-125000000�sY@ ������������opp2-250000000�沀 �g8g8g8������opp3-500000000��e �O�O�O������opp4-550000000� �U� �txtxtx�����opp5-600000000�#�F ��p�p�p�����opp6-720000000�*�T ��p�p�p������thermal-zonescpu_thermal���!N .�memory@80000000dmemoryp� compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-points-v2interruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthstatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinslinux,mtd-namebank-widthgpmc,mux-add-datagpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenlabelti,nand-ecc-optnand-bus-widthgpmc,device-widthmultipointnum-epsram-bitsiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensors