� ���d8v ( Du�Sony Xperia Z2 Tablet !sony,xperia-castorqcom,msm8974,reserved-memory=mpss@8000000DHmba@d100000D Hreserved@d200000D �Hadsp@dc00000D ��HOvenus@f500000DPPHsmem@fa00000D� HOtz@fc00000D�Hrfsa@fd60000D�Hrmtfs@fd80000D�Hcpus W cpu@0 !qcom,kraitbqcom,kpss-acc-v2pcpuD|���OKcpu@1 !qcom,kraitbqcom,kpss-acc-v2pcpuD|���OMcpu@2 !qcom,kraitbqcom,kpss-acc-v2pcpuD|�� �OOcpu@3 !qcom,kraitbqcom,kpss-acc-v2pcpuD|� � �OQl2-cache!cache�� Oidle-statesspc#!qcom,idle-state-spcarm,idle-state������OmemorypmemoryDthermal-zonescpu-thermal0��� tripstrip0!$�-�wpassivetrip1!��-� wcriticalcpu-thermal1��� tripstrip0!$�-�wpassivetrip1!��-� wcriticalcpu-thermal2��� tripstrip0!$�-�wpassivetrip1!��-� wcriticalcpu-thermal3��� tripstrip0!$�-�wpassivetrip1!��-� wcriticalq6-dsp-thermal��� tripstrip-point0!_�-�whotmodemtx-thermal��� tripstrip-point0!_�-�whotvideo-thermal��� tripstrip-point0!s-�whotwlan-thermal��� tripstrip-point0!�(-�whotgpu-thermal-top��� tripstrip-point0!_�-�whotgpu-thermal-bottom��� tripstrip-point0!_�-�whotcpu-pmu!qcom,krait-pmu Wclocksxo_board !fixed-clock8E$�Osleep_clk !fixed-clock8E�timer!arm,armv7-timer0WE$�adsp-pil!qcom,msm8974-adsp-pil@U�#iwdogfatalreadyhandoverstop-acky��xo���stopsmem !qcom,smem���smp2p-adsp !qcom,smp2p���, W� � �master-kernelmaster-kernel&Oslave-kernel slave-kernel=ROsmp2p-modem !qcom,smp2p���, W ��master-kernelmaster-kernel&slave-kernel slave-kernel=Rsmp2p-wcnss !qcom,smp2p���, W� ��master-kernelmaster-kernel&slave-kernel slave-kernel=Rsmsm !qcom,smsm c  n  yapps@0D&modem@1D W=Radsp@2D W�=Rwcnss@7D W�=Rfirmwarescm !qcom,scm�����corebusifacesoc= !simple-businterrupt-controller@f9000000!qcom,msm-qgic2=RD�� Osyscon@f9011000!sysconD�Oqfprom@fc4bc000 !qcom,qfpromD�K�calib@d0D�Obackup@440D@Othermal-sensor@fc4a9000!qcom,msm8974-tsensD�J��J���calibcalib_backup�  W�iuplow�O timer@f9020000=!arm,armv7-timer-memD�E$�frame@f9021000�WD�� frame@f9023000� W D�0 �disabledframe@f9024000� W D�@ �disabledframe@f9025000� W D�P �disabledframe@f9026000� W D�` �disabledframe@f9027000� W D�p �disabledframe@f9028000� WD�� �disabledpower-controller@f9089000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D����Opower-controller@f9099000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D� ���Opower-controller@f90a9000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D� ���O power-controller@f90b9000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D� ���O power-controller@f9012000 !qcom,saw2D� �O clock-controller@f9088000!qcom,kpss-acc-v2D����Oclock-controller@f9098000!qcom,kpss-acc-v2D� ���Oclock-controller@f90a8000!qcom,kpss-acc-v2D� ���Oclock-controller@f90b8000!qcom,kpss-acc-v2D� ���O restart@fc4ab000 !qcom,psholdD�J�clock-controller@fc400000!qcom,gcc-msm8974pro8��D�@@Osyscon@fd4a0000!sysconD�JO(syscon@fd484000!sysconD�H@ Oclock-controller@fd8c0000!qcom,mmcc-msm89748��D��`OStcsr-mutex!qcom,tcsr-mutex � Omemory@fc428000!qcom,rpm-msg-ramD�B�@Oserial@f991d000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmD��� Wk�eW �coreiface �disabledserial@f991e000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmD��� Wl�gW �coreiface�okdefault'sdhci@f9824900%!qcom,msm8974-sdhciqcom,sdhci-msm-v4D��I��@1hc_memcore_memW{�ihc_irqpwr_irq$���10�coreifacexocalsleep�ok;GT^default'sdhci@f9864900%!qcom,msm8974-sdhciqcom,sdhci-msm-v4D��I��@1hc_memcore_memW�ihc_irqpwr_irq����coreifacexo�okl��^;default' bcrmf@1$!brcm,bcm4339-fmacbrcm,bcm4329-fmacDz default'!sdhci@f98a4900%!qcom,msm8974-sdhciqcom,sdhci-msm-v4D��I��@1hc_memcore_memW}�ihc_irqpwr_irq����coreifacexo�okT;"G# �$>default'%&usb@f9a55000 !qcom,ci-hdrcD��P��R W��  �ifacecore� �xh�� �core�ulpi�otg��usb-phy�ok��' (� )*+*6O,ulpiphy@a(!qcom,usb-hs-phy-msm8974qcom,usb-hs-phyB � �refsleep� ,�phypor�okM-Y. )edO'phy@b(!qcom,usb-hs-phy-msm8974qcom,usb-hs-phyB � �refsleep� ,�phypor �disabledrng@f9bff000 !qcom,prngD������corepinctrl@fd510000!qcom,msm8974-pinctrlD�Q@s�=R W�O$blsp1-uart2-pin-activeOrx�gpio5 �blsp_uart2�tx�gpio4 �blsp_uart2�i2c8O/mux�gpio47gpio48 �blsp_i2c8�i2c11O4mux�gpio83gpio84 �blsp_i2c11�lcd-backlight-vddio�gpio69 ��O]sdhc1-pin-activeOclk �sdc1_clk�cmd-data�sdc1_cmdsdc1_data �sdhc2-cd-pin-active�gpio62�gpio�O&sdhc2-pin-activeO%clk �sdc2_clk�cmd-data�sdc2_cmdsdc2_data�sdhc3-pin-activeO clk�gpio40�sdc3 �cmd�gpio39�sdc3 �data�gpio35gpio36gpio37gpio38�sdc3 �synapticsO2pin�gpio86�gpio��i2c@f9923000 �disabled!qcom,i2c-qup-v2.1.1D��0 W_�YW �coreifacei2c@f9924000 �disabled!qcom,i2c-qup-v2.1.1D��@ W`�[W �coreifacei2c@f9925000 �disabled!qcom,i2c-qup-v2.1.1D��P Wa�]W �coreifacei2c@f9964000�ok!qcom,i2c-qup-v2.1.1D��@ Wf�uq �coreifaceEj�����default'/synaptics@2c!syna,rmi4-i2cD,,$WV�0�1default'2� rmi-f01@1D rmi-f11@11D&i2c@f9967000�ok!qcom,i2c-qup-v2.1.1D��p Wi�{q �coreiface733replicator@fc31c000/!arm,coresight-dynamic-replicatorarm,primecellD�1��:: �apb_pclkatclkout-portsport@0DendpointU=O;port@1DendpointU>O<in-portsportendpointU?O@etf@fc307000 !arm,coresight-tmcarm,primecellD�0p�:: �apb_pclkatclkout-portsportendpointU@O?in-portsportendpointUAOCfunnel@fc31b000+!arm,coresight-dynamic-funnelarm,primecellD�1��:: �apb_pclkatclkin-portsport@1DendpointUBOEout-portsportendpointUCOAfunnel@fc31a000+!arm,coresight-dynamic-funnelarm,primecellD�1��:: �apb_pclkatclkin-portsport@5DendpointUDOJout-portsportendpointUEOBfunnel@fc345000+!arm,coresight-dynamic-funnelarm,primecellD�4P�:: �apb_pclkatclkin-portsport@0DendpointUFOLport@1DendpointUGONport@2DendpointUHOPport@3DendpointUIORout-portsportendpointUJODetm@fc33c000"!arm,coresight-etm4xarm,primecellD�3��:: �apb_pclkatclkeKout-portsportendpointULOFetm@fc33d000"!arm,coresight-etm4xarm,primecellD�3��:: �apb_pclkatclkeMout-portsportendpointUNOGetm@fc33e000"!arm,coresight-etm4xarm,primecellD�3��:: �apb_pclkatclkeOout-portsportendpointUPOHetm@fc33f000"!arm,coresight-etm4xarm,primecellD�3��:: �apb_pclkatclkeQout-portsportendpointUROImdss@fd900000 �disabled !qcom,mdssD����@1mdss_physvbif_physiS�S]S^Sm�ifacebusvsync WH=R=OTmdp@fd900000 �disabled !qcom,mdp5D��  1mdp_phys,TW �S]S^SiSm�ifacebuscorevsyncportsport@0DendpointUUOWdsi@fd922800 �disabled!qcom,mdss-dsi-ctrlD��(� 1dsi_ctrl,TW�S!SwVV8�SiS]S^S_SkSdSn-�mdp_coreifacebusbytepixelcorecore_mmss�V�dsi-phyportsport@0DendpointUWOUport@1Dendpointdsi-phy@fd922a00 �disabled!qcom,dsi-phy-28nm-hpmD��*���+���-�0"1dsi_plldsi_phydsi_phy_regulator8B��S]�ifaceOVimem@fe805000 �disabled!sysconsimple-mfdD��Preboot-mode!syscon-reboot-mode�\smd !qcom,smdadsp W� ��modem W � �rpm W� ��rpm_requests!qcom,rpm-msm8974 �rpm_requestsclock-controller!qcom,rpmcc-msm8974qcom,rpmcc8O:pm8841-regulators!qcom,rpm-pm8841-regulatorss1s2Os3s4s5s6s7s8pm8941-regulators!qcom,rpm-pm8941-regulators�X��X Y Y -Z GZ bZs1k� ��  q �OXs2k �p� �p �OYs3kw@�w@ q � �Y�Ol1k�(��( q �l2kO��O�l3kO��O�l4k�(��(l5kw@�w@l6kw@�w@ �O-l7kw@�w@ �l8kw@�w@l9kw@�-pl10l11k� ��pl12kw@�w@ q �l13kw@�-p �O#l14kw@�w@l15kG��G�l16k)2��)2�l17k)2��)2�l18k+|��+|�l19k+|��+|�l20k-p�-p � � �� Ol21k-p�-p �O"l22k-���-��O0l23k*���*��l24k.��.� �O.lvs1lvs2lvs3O1s4kLK@�LK@vreg-boost!regulator-fixed �vreg-boostk0��0� q � �7 �default'[OZvreg-vph-pwr!regulator-fixed �vph-pwrk6��6� qaliases �/soc/serial@f991e000chosen �serial0:115200n8gpio-keys !gpio-keys gpio-keysdefault'\volume-down Vvolume_down �7  rcamera-snapshotVcamera_snapshot �7  �camera-focus Vcamera_focus �7  volume-up Vvolume_up �7  slcd-backlight-vddio!regulator-fixed �vreg_bl_vddiok0��0� �$E � ( 3pdefault']O5lcd-dcdc-regulator!regulator-fixed �vreg_vspkUs�Us �7 �default'^wlan-regulator!regulator-fixed �wl-regk2Z��2Z� �7 �default'_O #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandleinterruptsenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresis#clock-cellsclock-frequencyinterrupts-extendedinterrupt-namescx-supplyclocksclock-namesmemory-regionqcom,smem-statesqcom,smem-state-namesqcom,rpm-msg-ramhwlocksqcom,smemqcom,ipcqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsqcom,ipc-1qcom,ipc-2qcom,ipc-3nvmem-cellsnvmem-cell-names#qcom,sensors#thermal-sensor-cellsframe-numberstatusregulator#reset-cells#power-domain-cellssyscon#hwlock-cellspinctrl-namespinctrl-0reg-namesvmmc-supplyvqmmc-supplybus-widthnon-removablemax-frequencybrcm,drive-strengthcd-gpiosassigned-clocksassigned-clock-ratesresetsreset-namesphy_typedr_modeahb-burst-configphy-namesphysphy-selectextconvbus-supplyhnp-disablesrp-disableadp-disable#phy-cellsv1p8-supplyv3p3-supplyqcom,init-seqgpio-controller#gpio-cellspinsfunctionbias-pull-upbias-disableoutput-lowinput-enableqcom,src-freqvdd-supplyvio-supplysyna,startup-delay-mssyna,nosleepsyna,f11-flip-xsyna,sensor-typedmasdma-namespower-supplybl-namedev-ctrlinit-brtrom-addrrom-valqcom,eeqcom,channeldebounceusb-otg-in-supplyqcom,fast-charge-safe-currentqcom,fast-charge-current-limitqcom,dc-current-limitqcom,fast-charge-safe-voltageqcom,fast-charge-high-threshold-voltageqcom,fast-charge-low-threshold-voltageqcom,auto-recharge-threshold-voltageqcom,minimum-input-voltagegpio-rangespower-sourceoutput-highinput-disableio-channelsio-channel-names#io-channel-cellsqcom,external-resistor-micro-ohmsqcom,rset-ohmsqcom,vset-millivoltslabelvin_5vs-supplyregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-pull-downregulator-over-current-protectionqcom,ocp-max-retriesqcom,ocp-retry-delayqcom,vs-soft-start-strengthregulator-initial-mode#dma-cellsremote-endpointcpupower-domainsassigned-clock-parentsqcom,dsi-phy-indexoffsetqcom,smd-edgeqcom,smd-channelsvdd_l1_l3-supplyvdd_l2_lvs1_2_3-supplyvdd_l4_l11-supplyvdd_l5_l7-supplyvdd_l6_l12_l14_l15-supplyvdd_l9_l10_l17_l22-supplyvdd_l13_l20_l23_l24-supplyvdd_l21-supplyregulator-always-onregulator-boot-onregulator-system-loadregulator-allow-set-loadregulator-namegpioenable-active-highserial0stdout-pathinput-namelinux,input-typelinux,codevin-supplystartup-delay-us