� ��fD8Z(( Y�%motorola,droid4ti,omap4430ti,omap4 +7Motorola Droid 4 XT894chosenB=/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EX/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0B]/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Be/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bm/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bu/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 }/ocp/dsp�/ocp/ipu@55020000G�/ocp/target-module@58000000/dss@0/target-module@4000/encoder@0/panel@0 �/connectorcpus+cpu@0arm,cortex-a9�cpu����cpu��� ����� '�O� 5�a�����cpu@1arm,cortex-a9�cpu��pmuarm,cortex-a9-pmudebugssinterrupt-controller@48241000arm,cortex-a9-gic&�H$H$ �cache-controller@48242000arm,pl310-cache�H$ 7E�local-timer@48240600arm,cortex-a9-twd-timer��H$  Q  interrupt-controller@48281000ti,omap4-wugen-mpu&�H( �socti,omap-inframpu ti,omap4-mpumpu\ocpti,omap4-l3-nocsimple-bus+al3_main_1l3_main_2l3_main_3�DD� EQ  interconnect@4a300000ti,omap4-l4-wkupsimple-bus�J0J0J0 haplaia0+$aJ0J1J2segment@0 simple-bus+�a`` ������@@PP����target-module@4000ti,sysc-omap2ti,sysc�@@ hrevsyscr �0�fck+ a@counter@0ti,omap-counter32k� target-module@6000ti,sysc-omap4ti,sysc�`hrev+ a` prm@0ti,omap4-prmsimple-bus�  Q + a clocks+sys_clkin_ck@110� ti,mux-clock� ���abe_dpll_bypass_clk_mux_ck@108� ti,mux-clock����3abe_dpll_refclk_mux_ck@10c� ti,mux-clock�� �2dbgclk_mux_ck�fixed-factor-clock���l4_wkup_clk_mux_ck@108� ti,mux-clock��syc_clk_div_ck@100�ti,divider-clock�����usim_ck@1858�ti,divider-clock���X��usim_fclk@1858�ti,gate-clock���Xtrace_clk_div_ck�ti,clkdm-gate-clock ��bandgap_fclk@1888�ti,gate-clock����clockdomainsemu_sys_clkdmti,clockdomain�l4_wkup_cm@1800 ti,omap4-cm�+ aclk@20 ti,clkctrl� \��emu_sys_cm@1a00 ti,omap4-cm�+ aclk@20 ti,clkctrl� ��prm@300#ti,omap4-prm-instti,omap-prm-inst��prm@400#ti,omap4-prm-instti,omap-prm-inst����_prm@500#ti,omap4-prm-instti,omap-prm-inst����prm@600#ti,omap4-prm-instti,omap-prm-inst��prm@700#ti,omap4-prm-instti,omap-prm-inst�����prm@f00#ti,omap4-prm-instti,omap-prm-inst�����prm@1000#ti,omap4-prm-instti,omap-prm-inst��prm@1100#ti,omap4-prm-instti,omap-prm-inst�@���prm@1200#ti,omap4-prm-instti,omap-prm-inst��prm@1300#ti,omap4-prm-instti,omap-prm-inst��prm@1400#ti,omap4-prm-instti,omap-prm-inst��prm@1600#ti,omap4-prm-instti,omap-prm-inst��prm@1700#ti,omap4-prm-instti,omap-prm-inst��prm@1900#ti,omap4-prm-instti,omap-prm-inst��prm@1b00#ti,omap4-prm-instti,omap-prm-inst�@�target-module@a000ti,sysc-omap4ti,sysc��hrev+ a�scrm@0ti,omap4-scrm� clocks+auxclk0_src_gate_ck@310� ti,composite-no-wait-gate-clock����auxclk0_src_mux_ck@310�ti,composite-mux-clock ����auxclk0_src_ck�ti,composite-clock��auxclk0_ck@310�ti,divider-clock�����*auxclk1_src_gate_ck@314� ti,composite-no-wait-gate-clock����auxclk1_src_mux_ck@314�ti,composite-mux-clock ����auxclk1_src_ck�ti,composite-clock��auxclk1_ck@314�ti,divider-clock�����+auxclk2_src_gate_ck@318� ti,composite-no-wait-gate-clock����auxclk2_src_mux_ck@318�ti,composite-mux-clock ����auxclk2_src_ck�ti,composite-clock�� auxclk2_ck@318�ti,divider-clock� ����,auxclk3_src_gate_ck@31c� ti,composite-no-wait-gate-clock����!auxclk3_src_mux_ck@31c�ti,composite-mux-clock ����"auxclk3_src_ck�ti,composite-clock�!"�#auxclk3_ck@31c�ti,divider-clock�#����-auxclk4_src_gate_ck@320� ti,composite-no-wait-gate-clock��� �$auxclk4_src_mux_ck@320�ti,composite-mux-clock ��� �%auxclk4_src_ck�ti,composite-clock�$%�&auxclk4_ck@320�ti,divider-clock�&��� �.auxclk5_src_gate_ck@324� ti,composite-no-wait-gate-clock���$�'auxclk5_src_mux_ck@324�ti,composite-mux-clock ���$�(auxclk5_src_ck�ti,composite-clock�'(�)auxclk5_ck@324�ti,divider-clock�)���$�/auxclkreq0_ck@210� ti,mux-clock�*+,-./��auxclkreq1_ck@214� ti,mux-clock�*+,-./��auxclkreq2_ck@218� ti,mux-clock�*+,-./��auxclkreq3_ck@21c� ti,mux-clock�*+,-./��auxclkreq4_ck@220� ti,mux-clock�*+,-./�� auxclkreq5_ck@224� ti,mux-clock�*+,-./��$clockdomainstarget-module@c000ti,sysc-omap4ti,syscctrl_module_wkup��� hrevsyscr+ a�scm@c000ti,omap4-scm-wkup��segment@10000 simple-bus+xa@@PP������������target-module@0ti,sysc-omap2ti,sysc�hrevsyscsyss�r � �fckdbclk+ agpio@0ti,omap4-gpio� Q*:&�starget-module@4000ti,sysc-omap2ti,sysc�@@@hrevsyscsyss�"r  ��fck+ a@wdt@0ti,omap4-wdtti,omap3-wdt�� QPtarget-module@8000ti,sysc-omap2-timerti,sysc����hrevsyscsyss�' r  � �fck+ a�FZtimer@0ti,omap3430-timer��� �fcktimer_sys_ck Q%e t �target-module@c000ti,sysc-omap2ti,sysc����hrevsyscsyss�' r  �X�fck+ a�keypad@0ti,omap4-keypad�� Qxhmpu����  ( !"#$%&*,-./01234g`8  95iljstarget-module@e000ti,sysc-omap4ti,syscctrl_module_pad_wkup��� hrevsyscr+ a�pinmux@40 ti,omap4-padconfpinctrl-single�@8+�&���pinmux_usb_gpio_mux_sel2_pins �{segment@20000 simple-bus+�a``��  00@@PPpp����target-module@0ti,sysc )disabled+ atarget-module@2000ti,sysc )disabled+ a target-module@4000ti,sysc )disabled+ a@target-module@6000ti,sysc )disabled+0a`p �0�interconnect@4a000000ti,omap4-l4-cfgsimple-bus�JJJ haplaia0+TaJJJJ J (J(0J0segment@0 simple-bus+�a 00@@PP``pp����@  00�� ��``pp�� @@PPtarget-module@2000ti,sysc-omap4ti,syscctrl_module_core�   hrevsyscr+ a scm@0ti,omap4-scm-coresimple-bus�+ ascm_conf@0syscon�+��control-phy@300ti,control-phy-usb2�hpower�bcontrol-phy@33cti,control-phy-otghs�<hotghs_control�atarget-module@4000ti,sysc-omap4ti,sysc�@hrev+ a@cm1@0ti,omap4-cm1simple-bus� + a clocks+extalt_clkin_ck� fixed-clock0�D�pad_clks_src_ck� fixed-clock0��0pad_clks_ck@108�ti,gate-clock�0��pad_slimbus_core_clks_ck� fixed-clock0�secure_32k_clk_src_ck� fixed-clock0�slimbus_src_clk� fixed-clock0��1slimbus_clk@108�ti,gate-clock�1� �sys_32k_ck� fixed-clock0��virt_12000000_ck� fixed-clock0��virt_13000000_ck� fixed-clock0�]@� virt_16800000_ck� fixed-clock0Y� virt_19200000_ck� fixed-clock0$�� virt_26000000_ck� fixed-clock0���� virt_27000000_ck� fixed-clock0���� virt_38400000_ck� fixed-clock0I��tie_low_clock_ck� fixed-clock0utmi_phy_clkout_ck� fixed-clock0��xclk60mhsp1_ck� fixed-clock0���Zxclk60mhsp2_ck� fixed-clock0���[xclk60motg_ck� fixed-clock0��dpll_abe_ck@1e0�ti,omap4-dpll-m4xen-clock�23������4dpll_abe_x2_ck@1f0�ti,omap4-dpll-x2-clock�4���5dpll_abe_m2x2_ck@1f0�ti,divider-clock�5�@���R�6abe_24m_fclk�fixed-factor-clock�6��abe_clk@108�ti,divider-clock�6��idpll_abe_m3x2_ck@1f4�ti,divider-clock�5�@���R�7core_hsd_byp_clk_mux_ck@12c� ti,mux-clock�7��,�8dpll_core_ck@120�ti,omap4-dpll-core-clock�8� $,(�9dpll_core_x2_ck�ti,omap4-dpll-x2-clock�9�:dpll_core_m6x2_ck@140�ti,divider-clock�:�@�@�Rdpll_core_m2_ck@130�ti,divider-clock�9�@�0�R�;ddrphy_ck�fixed-factor-clock�;��dpll_core_m5x2_ck@13c�ti,divider-clock�:�@�<�R�<div_core_ck@100�ti,divider-clock�<���Gdiv_iva_hs_clk@1dc�ti,divider-clock�<���i�@div_mpu_hs_clk@19c�ti,divider-clock�<���i�Fdpll_core_m4x2_ck@138�ti,divider-clock�:�@�8�R�=dll_clk_div_ck�fixed-factor-clock�=��dpll_abe_m2_ck@1f0�ti,divider-clock�4�����Jdpll_core_m3x2_gate_ck@134� ti,composite-no-wait-gate-clock�:��4�>dpll_core_m3x2_div_ck@134�ti,composite-divider-clock�:��4��?dpll_core_m3x2_ck�ti,composite-clock�>?�dpll_core_m7x2_ck@144�ti,divider-clock�:�@�D�Riva_hsd_byp_clk_mux_ck@1ac� ti,mux-clock�@����Adpll_iva_ck@1a0�ti,omap4-dpll-clock�A�����tB7���Bdpll_iva_x2_ck�ti,omap4-dpll-x2-clock�B�Cdpll_iva_m4x2_ck@1b8�ti,divider-clock�C�@���RtD�~�Ddpll_iva_m5x2_ck@1bc�ti,divider-clock�C�@���RtE�] �Edpll_mpu_ck@160�ti,omap4-dpll-clock�F�`dlh�dpll_mpu_m2_ck@170�ti,divider-clock��@�p�Rper_hs_clk_div_ck�fixed-factor-clock�7���Kusb_hs_clk_div_ck�fixed-factor-clock�7���Ql3_div_ck@100�ti,divider-clock�G����Hl4_div_ck@100�ti,divider-clock�H���lp_clk_div_ck�fixed-factor-clock�6���mpu_periphclk�fixed-factor-clock����ocp_abe_iclk@528�ti,divider-clock �I��(�per_abe_24m_fclk�fixed-factor-clock�J��dummy_ck� fixed-clock0clockdomainsmpuss_cm@300 ti,omap4-cm�+ aclk@20 ti,clkctrl� �tesla_cm@400 ti,omap4-cm�+ aclk@20 ti,clkctrl� ��^abe_cm@500 ti,omap4-cm�+ aclk@20 ti,clkctrl� l��Itarget-module@8000ti,sysc-omap4ti,sysc��hrev+ a� cm2@0ti,omap4-cm2simple-bus� + a clocks+per_hsd_byp_clk_mux_ck@14c� ti,mux-clock�K��L�Ldpll_per_ck@140�ti,omap4-dpll-clock�L�@DLH�Mdpll_per_m2_ck@150�ti,divider-clock�M��P��Udpll_per_x2_ck@150�ti,omap4-dpll-x2-clock�M�P�Ndpll_per_m2x2_ck@150�ti,divider-clock�N�@�P�R�Tdpll_per_m3x2_gate_ck@154� ti,composite-no-wait-gate-clock�N��T�Odpll_per_m3x2_div_ck@154�ti,composite-divider-clock�N��T��Pdpll_per_m3x2_ck�ti,composite-clock�OP�dpll_per_m4x2_ck@158�ti,divider-clock�N�@�X�R�dpll_per_m5x2_ck@15c�ti,divider-clock�N�@�\�Rdpll_per_m6x2_ck@160�ti,divider-clock�N�@�`�R�Sdpll_per_m7x2_ck@164�ti,divider-clock�N�@�d�R��dpll_usb_ck@180�ti,omap4-dpll-j-type-clock�Q������Rdpll_usb_clkdcoldo_ck@1b4�ti,fixed-factor-clock�R�@���Rdpll_usb_m2_ck@190�ti,divider-clock�R�@���R�Vducati_clk_mux_ck@100� ti,mux-clock�GS�func_12m_fclk�fixed-factor-clock�T��func_24m_clk�fixed-factor-clock�U��func_24mc_fclk�fixed-factor-clock�T��func_48m_fclk@108�ti,divider-clock�T��func_48mc_fclk�fixed-factor-clock�T��func_64m_fclk@108�ti,divider-clock���func_96m_fclk@108�ti,divider-clock�T��init_60m_fclk@104�ti,divider-clock�V���Yper_abe_nc_fclk@108�ti,divider-clock�J��sha2md5_fck@15c8�ti,gate-clock�H���usb_phy_cm_clk32k@640�ti,gate-clock���@�cclockdomainsl3_init_clkdmti,clockdomain�Rl4_ao_cm@600 ti,omap4-cm�+ aclk@20 ti,clkctrl� ��el3_1_cm@700 ti,omap4-cm�+ aclk@20 ti,clkctrl� �l3_2_cm@800 ti,omap4-cm�+ aclk@20 ti,clkctrl� ���ducati_cm@900 ti,omap4-cm� + a clk@20 ti,clkctrl� ���l3_dma_cm@a00 ti,omap4-cm� + a clk@20 ti,clkctrl� ��Wl3_emif_cm@b00 ti,omap4-cm� + a clk@20 ti,clkctrl� �d2d_cm@c00 ti,omap4-cm� + a clk@20 ti,clkctrl� ��dl4_cfg_cm@d00 ti,omap4-cm� + a clk@20 ti,clkctrl� ��fl3_instr_cm@e00 ti,omap4-cm�+ aclk@20 ti,clkctrl� $�ivahd_cm@f00 ti,omap4-cm�+ aclk@20 ti,clkctrl� ���iss_cm@1000 ti,omap4-cm�+ aclk@20 ti,clkctrl� ��hl3_dss_cm@1100 ti,omap4-cm�+ aclk@20 ti,clkctrl� ���l3_gfx_cm@1200 ti,omap4-cm�+ aclk@20 ti,clkctrl� ���l3_init_cm@1300 ti,omap4-cm�+ aclk@20 ti,clkctrl� ���Xl4_per_cm@1400 ti,omap4-cm�+ aclock@20ti,clkctrl-l4-perti,clkctrl� D��iclock@1a0 ti,clkctrl-l4-secureti,clkctrl��<��qtarget-module@56000ti,sysc-omap2ti,sysc�``,`(hrevsyscsyss�# � r  �W�fck+ a`dma-controller@0ti,omap4430-sdmati,omap-sdma�0Q  �� ��rtarget-module@58000ti,sysc-omap2ti,sysc����hrevsyscsyss�#�r  �X�fck+ a�Phsi@0 ti,omap4-hsi�@Phsysgdd �X�hsi_fck QG�gdd_mpu+ a@hsi-port@2000ti,omap4-hsi-port� (htxrx QChsi-port@3000ti,omap4-hsi-port�08htxrx QDtarget-module@5e000ti,sysc )disabled+ a� target-module@62000ti,sysc-omap2ti,sysc�   hrevsyscsyss� r �XH�fck+ a usbhstll@0 ti,usbhs-tll� QNtarget-module@64000ti,sysc-omap4ti,sysc�@@@hrevsyscsyss��r �X8�fck+ a@usbhshost@0ti,usbhs-host�+ a �YZ[3�refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2�ohci-phy-4pin-dpdm �ehci-tllohci@800ti,ohci-omap3� QL \%usbehci@c00 ti,ehci-omap�  QM ]target-module@66000ti,sysc-omap2ti,sysc�```hrevsyscsyss� r �^�fck/_=_Drstctrl+ a`mmu@0ti,omap4-iommu� QP��segment@80000 simple-bus+a� �� �� �� �� �� �@@PP``pp` `p p� �� �� �� �� �� �� �� �target-module@29000ti,sysc )disabled+ a�target-module@2b000ti,sysc-omap2ti,sysc����hrevsyscsyss� �r  �X@�fck+ a�usb_otg_hs@0ti,omap4-musb��Q\]�mcdma]` ` %usb2-phyepx �a����target-module@2d000ti,sysc-omap2ti,sysc����hrevsyscsyss� r  �X��fck+ a�ocp2scp@0ti,omap-ocp2scp�+ ausb2phy@80 ti,omap-usb2��X�b�c�wkupclk��`target-module@36000ti,sysc-omap2ti,sysc�```hrevsyscsyss�r  �d�fck+ a`target-module@4d000ti,sysc-omap2ti,sysc����hrevsyscsyss�r  �d�fck+ a�target-module@59000ti,sysc-omap4-srti,sysc��8hsysc�r �e�fck+ a�smartreflex@0ti,omap4-smartreflex-mpu�� Qtarget-module@5b000ti,sysc-omap4-srti,sysc��8hsysc�r �e�fck+ a�smartreflex@0ti,omap4-smartreflex-iva�� Qftarget-module@5d000ti,sysc-omap4-srti,sysc��8hsysc�r �e�fck+ a�smartreflex@0ti,omap4-smartreflex-core�� Qtarget-module@60000ti,sysc )disabled+ atarget-module@74000ti,sysc-omap4ti,sysc�@@ hrevsysc� r �f�fck+ a@mailbox@0ti,omap4-mailbox� Q�����mbox_ipu � ���mbox_dsp � ���target-module@76000ti,sysc-omap2ti,sysc�```hrevsyscsyss� r  �f�fck+ a`spinlock@0ti,omap4-hwspinlock��segment@100000 simple-bus+`a  00��������target-module@0ti,sysc-omap4ti,syscctrl_module_pad_core� hrevsyscr+ apinmux@40 ti,omap4-padconfpinctrl-single�@�+�&����jpinmux_hdmi_hpd_pinsX��pinmux_hdq_pins���pinmux_dss_hdmi_pinsZ\^��pinmux_mmc3_pins8N��������pinmux_poweroff_pins4��pinmux_tmp105_irqN�npinmux_usb_gpio_mux_sel1_pinsH�zpinmux_touchscreen_pins@`�opinmux_als_proximity_pinsL�ppinmux_usb_mdm6600_pinsX�<2>:8TV��pinmux_usb_ulpi_pinspVXrtvxz|~������|pinmux_usb_utmi_pinspVXrtvxz|~������}pinmux_uart1_pins ����kpinmux_uart3_pinspVXrtvxz|~������~pinmux_uart4_pins ���lpinmux_mcbsp2_pins ������pinmux_mcbsp3_pins ������pinmux_vibrator_direction_pin���pinmux_vibrator_enable_pin���omap4_padconf_global@5a0sysconsimple-bus��p+ a�p�gpbias_regulator@60ti,pbias-omap4ti,pbias-omap�`gpbias_mmc_omap4pbias_mmc_omap4w@/-����target-module@2000ti,sysc )disabled+ a target-module@8000ti,sysc )disabled+ a�target-module@a000ti,sysc-omap4ti,sysc��� hrevsysc� � rG �h�fck+ a�segment@180000 simple-bus+segment@200000 simple-bus+ha�!��!�� �� �@ @P P` `p p ! 0!0� �� �!!`!`p!p@!@P!P�!��!�""`"`p"p�"��"��"��"��!��!�target-module@4000ti,sysc )disabled+ a@target-module@6000ti,sysc )disabled+ a`target-module@a000ti,sysc )disabled+ a�target-module@c000ti,sysc )disabled+ a�target-module@10000ti,sysc )disabled+ atarget-module@12000ti,sysc )disabled+ a target-module@14000ti,sysc )disabled+ a@target-module@16000ti,sysc )disabled+ a`target-module@18000ti,sysc )disabled+ a�target-module@1c000ti,sysc )disabled+ a�target-module@1e000ti,sysc )disabled+ a�target-module@20000ti,sysc )disabled+ atarget-module@26000ti,sysc )disabled+ a`target-module@28000ti,sysc )disabled+ a�target-module@2a000ti,sysc )disabled+ a�segment@280000 simple-bus+segment@300000 simple-bus+�a042@@2@ `2`p2p�2��2�3�2� �2�@target-module@0ti,sysc )disabled+xa@@@ ``pp������ ��@interconnect@48000000ti,omap4-l4-persimple-bus0�HHHHHHhaplaia0ia1ia2ia3+aH H segment@0 simple-bus+�a  00@@PP``pp����PP``pp��������������������������  00 ` ` p p``pp����``pp����    � � � � � � � � � � � � � � � �  @ @ ` ` � �@ � � � � � �  0 0 @ @ P P � � � � � � � �    P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,sysc�PTXhrevsyscsyss�r  �i0�fck+ aserial@0ti,omap4-uart� QJ0�lXJj|target-module@32000ti,sysc-omap2-timerti,sysc�   hrevsyscsyss�' r  �i�fck+ a timer@0ti,omap3430-timer���i�fcktimer_sys_ck Q&target-module@34000ti,sysc-omap4-timerti,sysc�@@ hrevsysc�r �i �fck+ a@timer@0ti,omap4430-timer���i �fcktimer_sys_ck Q'target-module@36000ti,sysc-omap4-timerti,sysc�`` hrevsysc�r �i(�fck+ a`timer@0ti,omap4430-timer���i(�fcktimer_sys_ck Q(target-module@3e000ti,sysc-omap4-timerti,sysc��� hrevsysc�r �i0�fck+ a�timer@0ti,omap4430-timer���i0�fcktimer_sys_ck Q-l ti0���target-module@40000ti,sysc )disabled+ atarget-module@55000ti,sysc-omap2ti,sysc�PPQhrevsyscsyss�r �i@i@ �fckdbclk+ aPgpio@0ti,omap4-gpio� Q*:&�target-module@57000ti,sysc-omap2ti,sysc�ppqhrevsyscsyss�r �iHiH �fckdbclk+ apgpio@0ti,omap4-gpio� Q*:&�wtarget-module@59000ti,sysc-omap2ti,sysc����hrevsyscsyss�r �iPiP �fckdbclk+ a�gpio@0ti,omap4-gpio� Q *:&��target-module@5b000ti,sysc-omap2ti,sysc����hrevsyscsyss�r �iXiX �fckdbclk+ a�gpio@0ti,omap4-gpio� Q!*:&��target-module@5d000ti,sysc-omap2ti,sysc����hrevsyscsyss�r �i`i` �fckdbclk+ a�gpio@0ti,omap4-gpio� Q"*:&�mtarget-module@60000ti,sysc-omap2ti,sysc��hrevsyscsyss�r  �i��fck+ ai2c@0 ti,omap4-i2c� Q=+target-module@6a000ti,sysc-omap2ti,sysc��P�T�Xhrevsyscsyss�r  �i �fck+ a�serial@0ti,omap4-uart� QH0�lydefault�kXHj���target-module@6c000ti,sysc-omap2ti,sysc��P�T�Xhrevsyscsyss�r  �i(�fck+ a�serial@0ti,omap4-uart� QI0�ltarget-module@6e000ti,sysc-omap2ti,sysc��P�T�Xhrevsyscsyss�r  �i8�fck+ a�serial@0ti,omap4-uart� QF0�lydefault�lbluetooth ti,wl1285-st �m�8@target-module@70000ti,sysc-omap2ti,sysc��hrevsyscsyss�r  �i��fck+ ai2c@0 ti,omap4-i2c� Q8+tmp105@48 ti,tmp105�H�nydefaultXmjN �irqwakeup�led-controller@38 ti,lm3532+�8 �m �� led@0��� :backlight��led@1���:kbd_backlighttarget-module@72000ti,sysc-omap2ti,sysc�   �hrevsyscsyss�r  �i��fck+ a i2c@0 ti,omap4-i2c� Q9+touchscreen@4aatmel,maxtouch�Jydefault�o  m Xmj` �irqwakeup�isl29030@44isil,isl29030�Dydefault�p mQtarget-module@76000ti,sysc-omap4ti,sysc�`` hrevsysc�r �i�fck+ a`target-module@78000ti,sysc-omap2ti,sysc����hrevsyscsyss� r  �i8�fck+ a�elm@0ti,am3352-elm�  Q )disabledtarget-module@86000ti,sysc-omap2-timerti,sysc�```hrevsyscsyss�' r  �i�fck+ a`timer@0ti,omap3430-timer���i�fcktimer_sys_ck Q.ltarget-module@88000ti,sysc-omap4-timerti,sysc��� hrevsysc�r �i�fck+ a�timer@0ti,omap4430-timer���i�fcktimer_sys_ck Q/ltarget-module@90000ti,sysc-omap2ti,sysc� � � hrevsysc�r �q �fck+ a  )disabledrng@0 ti,omap4-rng�  Q4target-module@96000ti,sysc-omap2ti,sysc� `�hsysc� r �i��fck+ a `mcbsp@0ti,omap4-mcbsp��hmpu Q�common�%rr *txrx )disabledtarget-module@98000ti,sysc-omap4ti,sysc� � � hrevsysc�r �i��fck+ a �spi@0ti,omap4-mcspi� QA+4@%r#r$r%r&r'r(r)r* *tx0rx0tx1rx1tx2rx2tx3rx3pmic@0motorola,cpcapst,6556002� sQ&+B�|T`i�tadcmotorola,mapphone-cpcap-adc Xt�adcdoner�ubatterymotorola,cpcap-batteryHXttttt6t9+�eollowbphlowbplchrgcurr1battdetbcccal �uuuu �battdetbbattpchg_isensebatti�vcharger motorola,mapphone-cpcap-chargerlXt t ttttttt6T�chrg_detrvrs_chrgchrg_se1bse0connrvrs_modechrgcurr2chrgcurr1vbusvldbattdetb�ww(�uuuuu%�battdetbbattpvbuschg_isensebatti�vregulator"motorola,mapphone-cpcap-regulatorregulatorsSW5M�/M���P���VCAM,@ /,@ ��VCSIw@/w@�����VDACw@/w@����VDIG�8/�8��VFUSE�`/0���VHVIO*W�/*W������VSDIO,@ /,@ ����VPLLO�/w@�dVRF1*W�/*W���VRF2*W�/*W���VRFREF&%�/*W��dVWLAN1w@/����VWLAN2-��/-������VSIMw@/,@ ��VSIMCARDw@/,@ ��VVIB� /-����VUSB2Z�/2Z�����VAUDIO*W�/*W����audio-codecport@0endpoint%x��port@1endpoint%y��rtcmotorola,cpcap-rtc tQ'buttonmotorola,cpcap-pwrbuttonQphy motorola,mapphone-cpcap-usb-phy�z{5|?}I~ydefaultulpiutmiuart�lXtttttttt1t0=�id_groundid_floatse0connvbusvldsessvldsessendse1dmdp�s�uu�vbusidS�led-redmotorola,cpcap-led-red_�status-led:redled-greenmotorola,cpcap-led-green_�status-led:greenled-bluemotorola,cpcap-led-blue_�status-led:blueled-adlmotorola,cpcap-led-adl_�button-backlightled-cpmotorola,cpcap-led-cp_�shift-key-lighttarget-module@9a000ti,sysc-omap4ti,sysc� � � hrevsysc�r �i��fck+ a �spi@0ti,omap4-mcspi� QB+4 %r+r,r-r.*tx0rx0tx1rx1target-module@9c000ti,sysc-omap4ti,sysc� � � hrevsysc��r �X�fck+ a �mmc@0ti,omap4-hsmmc� QSjw%r=r>*txrx����� �mtarget-module@9e000ti,sysc )disabled+ a �target-module@a2000ti,sysc )disabled+ a target-module@a4000ti,sysc )disabled+a @ Ptarget-module@a5000ti,sysc-omap2ti,sysc� P0 P4 P8hrevsyscsyss�r  �q�fck+ a Pdes@0 ti,omap4-des�� QR%rurt*txrxtarget-module@a8000ti,sysc )disabled+ a �@target-module@ad000ti,sysc-omap4ti,sysc� � � hrevsysc��r �i�fck+ a �mmc@0ti,omap4-hsmmc� Q^w%rMrN*txrxydefault����X^j� �irqwakeup����+wlcore@2ti,wl1285ti,wl1283�X�jN �irqwakeup�������target-module@b0000ti,sysc )disabled+ a target-module@b2000ti,sysc-omap2ti,sysc�   hrevsyscsyss� F �ih�fck+ a 1w@0 ti,omap3-1w� Q:��ydefault1wtarget-module@b4000ti,sysc-omap4ti,sysc� @ @ hrevsysc��r �X�fck+ a @mmc@0ti,omap4-hsmmc� QVw%r/r0*txrx���"target-module@b8000ti,sysc-omap4ti,sysc� � � hrevsysc�r �i��fck+ a �spi@0ti,omap4-mcspi� Q[+4%rr*tx0rx0target-module@ba000ti,sysc-omap4ti,sysc� � � hrevsysc�r �i��fck+ a �spi@0ti,omap4-mcspi� Q0+4%rFrG*tx0rx0target-module@d1000ti,sysc-omap4ti,sysc�   hrevsysc��r �i�fck+ a mmc@0ti,omap4-hsmmc� Q`w%r9r:*txrxtarget-module@d5000ti,sysc-omap4ti,sysc� P P hrevsysc��r �i@�fck+ a Pmmc@0ti,omap4-hsmmc� Q;w%r;r<*txrxsegment@200000 simple-bus+a55target-module@150000ti,sysc-omap2ti,sysc��hrevsyscsyss�r  �i��fck+ ai2c@0 ti,omap4-i2c� Q>+magnetometer@casahi-kasei,ak8975� _� mQ3-10001000-1accelerometer@18st,lis3dh-accel�_� Q30-10100001interconnect@40100000ti,omap4-l4-abesimple-pm-bus�@@hlaap/�+a@IIsegment@0simple-pm-bus+0a  00@@PP``pp������������  00����������������      IIIII I I0I0I@I@IPIPI`I`IpIpI�I�I�I�I�I�I�I�I�I�I�I�IIIII I I0I0I�I�I�I�I�I�I�I�I�I�I�I�I�I�I�I�IIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,sysc� �hsysc� r �I(�fck+a I I mcbsp@0ti,omap4-mcbsp��I �hmpudma Q�common�%r!r"*txrx )disabledtarget-module@24000ti,sysc-omap2ti,sysc�@�hsysc� r �I0�fck+a@I@I@mcbsp@0ti,omap4-mcbsp��I@�hmpudma Q�common�%rr*txrx)okayydefault��port��endpointCi2s%�N�[��xtarget-module@26000ti,sysc-omap2ti,sysc�`�hsysc� r �I8�fck+a`I`I`mcbsp@0ti,omap4-mcbsp��I`�hmpudma Q�common�%rr*txrx)okayydefault��port��endpointCdsp_aN�[�%��ytarget-module@28000ti,sysc-mcaspti,sysc��� hrevsyscr �I �fck+a�I�I�target-module@2a000ti,sysc )disabled+a�I�I�target-module@2e000ti,sysc-omap4ti,sysc��� hrevsysc�r �I�fck+a�I�I�dmic@0ti,omap4-dmic�I�hmpudma Qr%rC*up_link )disabledtarget-module@30000ti,sysc-omap2ti,sysc�hrevsyscsyss�"r  �Ih�fck+aIIwdt@0ti,omap4-wdtti,omap3-wdt�� QPtarget-module@32000ti,sysc-omap4ti,sysc�   hrevsysc�r �I�fck+a I I  )disabledmcpdm@0ti,omap4-mcpdm�I hmpudma Qp%rArB*up_linkdn_linktarget-module@38000ti,sysc-omap4-timerti,sysc��� hrevsysc�r �IH�fck+a�I�I�timer@0ti,omap4430-timer��I���IH��fcktimer_sys_ck Q)ktarget-module@3a000ti,sysc-omap4-timerti,sysc��� hrevsysc�r �IP�fck+a�I�I�timer@0ti,omap4430-timer��I���IP��fcktimer_sys_ck Q*ktarget-module@3c000ti,sysc-omap4-timerti,sysc��� hrevsysc�r �IX�fck+a�I�I�timer@0ti,omap4430-timer��I���IX��fcktimer_sys_ck Q+ktarget-module@3e000ti,sysc-omap4-timerti,sysc��� hrevsysc�r �I`�fck+a�I�I�timer@0ti,omap4430-timer��I���I`��fcktimer_sys_ck Q,lk tI`���target-module@80000ti,sysc )disabled+aIItarget-module@a0000ti,sysc )disabled+a I I target-module@c0000ti,sysc )disabled+a I I target-module@f1000ti,sysc-omap4ti,sysc� hrevsysc� r �I�fck+aIIsram@40304000 mmio-sram�@0@��target-module@50000000ti,sysc-omap2ti,sysc�PPPhrevsyscsyss r x ���fck+aPP@gpmc@50000000ti,omap4430-gpmc�P+ Q%r*rxtx���H�fck&*:target-module@52000000ti,sysc-omap4ti,sysciss�RR hrevsysc��rG �h�fck+ aRtarget-module@55082000ti,sysc-omap2ti,sysc�U U U hrevsyscsyss r� ���fck=�Drstctrl aU +mmu@0ti,omap4-iommu� QdP���target-module@4012c000ti,sysc-omap4ti,sysc�@�@� hrevsysc�r �I@�fck+a@�I�I�dmm@4e000000 ti,omap4-dmm�N Qqdmmemif@4c000000 ti,emif-4d�L Qnemif1x����emif@4d000000 ti,emif-4d�M Qoemif2x����dsp ti,omap4-dsp � �=_ �^ omap4-dsp-fw.xe64T '�� )disabledipu@55020000 ti,omap4-ipu�Uhl2ram �=�� �� omap4-ipu-fw.xem3 '�� )disabledtarget-module@4b501000ti,sysc-omap2ti,sysc�KP�KP�KP�hrevsyscsyss�r  �q�fck+ aKPaes@0 ti,omap4-aes�� QU%rorn*txrxtarget-module@4b701000ti,sysc-omap2ti,sysc�Kp�Kp�Kp�hrevsyscsyss�r  �q�fck+ aKpaes@0 ti,omap4-aes�� Q@%rrrq*txrxtarget-module@4b100000ti,sysc-omap3-shamti,sysc�KKKhrevsyscsyss� r  �q(�fck+ aKsham@0ti,omap4-sham� Q3%rw*rxregulator-abb-mpu ti,abb-v2abb_mpu+ .�� G2 X)okay�J0{�J0`hbase-addressint-addressx h��O���1�regulator-abb-iva ti,abb-v2abb_iva+ .�� G2 X )disabled�J0{�J0`hbase-addressint-addresstarget-module@56000000ti,sysc-omap4ti,sysc�V�V� hrevsysc�r ���fck+ aVt�� '���target-module@58000000ti,sysc-omap2ti,sysc�XX hrevsyss /�0��� � � �fckhdmi_clksys_clktv_clk+ aXdss@0 ti,omap4-dss��)okay ���fck+ atarget-module@1000ti,sysc-omap2ti,sysc�hrevsyscsyss r �� ���  �fcksys_clk+ adispc@0ti,omap4-dispc� Q ���fcktarget-module@2000ti,sysc-omap2ti,sysc�   hrevsyscsyss r� ���  �fcksys_clk+ a encoder@0� )disabled��H�fckicktarget-module@3000ti,sysc-omap2ti,sysc�0hrev �� �sys_clk+ a0encoder@0ti,omap4-venc� )disabled �� �fcktarget-module@4000ti,sysc-omap2ti,sysc�@@@hrevsyscsyss r� + a@encoder@0 ti,omap4-dsi�@ hprotophypll Q5)okay���  �fcksys_clk+_�portendpoint%� t��panel@0#motorola,droid4-panelpanel-dsi-cm�lcd0 z�  � �� �2 �Y �Zpanel-timing0 � � � � � �� � �    &portendpoint%���target-module@5000ti,sysc-omap2ti,sysc�PPPhrevsyscsyss r� + aPencoder@0 ti,omap4-dsi�@ hprotophypll QT )disabled���  �fcksys_clk+target-module@6000ti,sysc-omap4ti,sysc�`` hrevsyscr��� � �fckdss_clk+ a` encoder@0ti,omap4-hdmi �hwppllphycore Qe)okay�� �  �fcksys_clk%rL *audio_tx��ydefault 6�portendpoint%� t��target-module@5a000000ti,sysc-omap4ti,sysc�Z�Z� hrevsysc � r/�=�Drstctrl ���fck+aZZ[[iva ti,ivahdbandgap@4a002260�J"`J#,ti,omap4430-bandgap �w B��thermal-zonescpu_thermal X� n� |� �N tripscpu_alert ��� ���passive��cpu_crit ��H �� �criticalcooling-mapsmap0 �� ����������memory�memory��?�gpio-poweroffgpio-poweroff��ydefault �connectorhdmi-connector��ydefaulthdmi�d �portendpoint%���regulator-hdmiregulator-fixedhdmiLK@/LK@ � ��usb-phy@1motorola,mapphone-mdm6600��ydefault �w �   ���$ ���$ ��\usb-phy@2usb-nop-xceiv��]regulator-lcdregulator-fixedlcdM�/M� �� � /���regulator-wl12xxregulator-fixedvwl1271-P/-P �w :p ���soundcardaudio-graph-cardMapphone AudioV KSpeakerEarpieceSpeakerLoudspeakerHeadphoneHeadphone JackMicrophoneInternal MicU SEarpieceEPLoudspeakerSPKRHeadphone JackHSLHeadphone JackHSRMICRInternal Mic [��dmtimer-pwm-8ydefault��ti,omap-dmtimer-pwm ` k� u��dmtimer-pwm-9ydefault��ti,omap-dmtimer-pwm ` k� u��vibrator pwm-vibrator ��������� �enabledirection ����backlightled-backlight �� �?_���� ���gpio_keys gpio-keysvolume_down Volume Down �� �r � � slider Keypad SlideXj� ��  �  � �  compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2i2c3serial0serial1serial2serial3rproc0rproc1display0display1device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleti,hwmodsinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptssramrangesreg-namesti,sysc-sidle#clock-cellsti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#power-domain-cells#reset-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentskeypad,num-rowskeypad,num-columnslinux,keymap#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesport1-modeport2-moderemote-wakeup-connectedphysphy-namespower-domainsresetsreset-names#iommu-cellsusb-phymultipointnum-epsram-bitsctrl-moduleinterface-typepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmpinctrl-namespinctrl-0uart-has-rtsctscurrent-speedenable-gpiosmax-speedwakeup-sourceramp-up-usramp-down-usled-sourcesti,led-modelabelreset-gpiosti,buffer-sizedmasdma-namesti,spi-num-csspi-max-frequencyspi-cs-highspi-cpolspi-cpha#io-channel-cellsio-channelsio-channel-namespower-suppliesmode-gpiosregulator-enable-ramp-delayregulator-boot-onregulator-always-onregulator-initial-mode#sound-dai-cellsremote-endpointpinctrl-1pinctrl-2pinctrl-3vusb-supplyvdd-supplyti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-gpiosnon-removablecap-power-off-cardkeep-power-in-suspendref-clock-frequencytcxo-clock-frequencyti,modeti,non-removablerotation-matrixdai-formatframe-masterbitclock-masterti,timer-dspti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertti,bootregiommusfirmware-namemboxesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infolanesvddi-supplybacklightwidth-mmheight-mmrotationhback-porchhactivehfront-porchhsync-lenvback-porchvactivevfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activevdda-supply#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicehpd-gpiosgpioenable-active-highpower-gpiosmotorola,mode-gpiosmotorola,cmd-gpiosmotorola,status-gpiosvin-supplystartup-delay-uswidgetsroutingdais#pwm-cellsti,timersti,clock-sourcepwmspwm-namesdirection-duty-cycle-nsledsbrightness-levelsdefault-brightness-levellinux,codelinux,can-disabledebounce-intervallinux,input-type